Banderacom Integrates Silicon Metrics' Critical Path Verification Solution into InfiniBand Product Design Flow

SiliconSmart PATH Adopted for Analysis of Complex Electrical Effects in Nanometer Silicon Technology

AUSTIN, Texas--(BUSINESS WIRE)--May 13, 2002-- Silicon Metrics Corporation today announced the successful integration of SiliconSmart PATH into Banderacom's advanced COT (Customer Owned Tooling) design flow for its InfiniBand(tm) semiconductor products.

With SiliconSmart PATH the Banderacom design team improved IC design performance by rapidly identifying, isolating, and correcting potential timing hazards in the timing analysis flow. Designers use SiliconSmart PATH to perform detailed transistor-level analysis with gate-level tools to uncover timing hazards that would otherwise go undetected, resulting in a silicon respin. The tool's what-if analysis capability reduces timing analysis cycles from weeks to hours and drives the final design to a successful and on-schedule tapeout.

"SiliconSmart PATH helped us identify timing issues earlier in the design process, enabling us to achieve timing requirements and successfully meet our delivery schedule," said Terry Hulett, Vice President of Engineering at Banderacom. "After only an hour of training, our team was able to detect hidden timing hazards on a pre-tapeout IC design. By isolating serious timing hazards on multiple critical paths in the design, we avoided a costly and time consuming chip respin. SiliconSmart PATH is now a required part of our sign-off flow."

Banderacom's designers used SiliconSmart PATH's transistor-level analysis capabilities to obtain results that mirrored actual silicon behavior. With SiliconSmart PATH, transistor-level analysis became a fully automated extension to the gate-level static timing analysis (STA) environment. Transistor-accurate timing enabled Banderacom's designers to perform post-layout characterization of the paths in the design and guided design construction tools to take preventive and corrective actions.

"In addition to the need for accurate cell libraries, the complexity of today's designs requires post-layout characterization for accurate timing analysis and sign-off," said Callan Carpenter, president and CEO of Silicon Metrics. "COT and IDM design teams in leading technology companies like Banderacom are finding SiliconSmart PATH to be a crucial tool in identifying and correcting timing hazards prior to chip tapeout."

About SiliconSmart PATH

SiliconSmart PATH accelerates nanometer timing verification and correction processes by providing transistor-level analysis within popular gate-level STA tools. Designers perform transistor-level analysis within the STA environment, without having to gain the knowledge and sophistication required to run stand-alone SPICE simulations. Architected for multimillion-gate systems-on-a-chip (SoC) designs using process technologies of 180 nanometers and below, SiliconSmart PATH is the key to eliminating silicon respins due to timing flaws, reducing design iterations and improving design performance. SiliconSmart PATH streamlines existing design flows for higher performance silicon and faster time-to-market. With SiliconSmart PATH, designers are able to get full performance out of advanced nanometer silicon processes.

About Silicon Metrics Corporation

Silicon Metrics' characterization, modeling, and analysis products allow customers to shorten design cycles and improve chip performance by creating best-in-class models that combine silicon predictability with designer productivity. Silicon Metrics is a privately held company with offices in Austin, Texas, and San Jose, Calif. Marubeni Solutions represents Silicon Metrics in Japan. Company investors include Austin Ventures, Needham Capital Partners, Current Ventures, Cadence Design Systems Inc. (NYSE:CDN - News), and Synopsys Inc. (Nasdaq:SNPS - News). For more information, call 888/828-3736, or visit Silicon Metrics online at http://www.siliconmetrics.com.

About Banderacom

Banderacom is an Austin, Texas-based fabless semiconductor company focused on dramatically increasing the performance and reliability of networking, storage and server system products in the dynamic new world of InfiniBand. Banderacom provides flexible, high-performance semiconductors based on InfiniBand specifications. Banderacom is also a Sponsoring Member of the InfiniBand Trade Association, and participates in the association's Marketing Working Group (MWG), MWG IT Subgroup, MWG Benchmark Subgroup, and Compatibility and Interoperability Working Group (CIWG).

Banderacom was founded in 1999 by a veteran team from the microprocessor and communications semiconductor industries. Banderacom is funded by multiple capital partners, including Austin Ventures, Infinity Venture Capital, Jato Tech Ventures, Trinity Venture Capital, Intel, and QLogic Corporation. For more information, visit www.banderacom.com or call 512/302-0002.

Silicon Metrics, Silicon Metrics (logo), and SiliconSmart are trademarks or registered trademarks of Silicon Metrics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.

     Silicon Metrics Corporation, Austin
     Karen Caropepe, 512/651-1461
     karen@siliconmetrics.com
      or
     VitalCom
     Lou Covey, 650/637-8212
     lou@vitalcompr.com
      or
     Banderacom
     Sandy Helsel, 512/493-3227
     sandy.helsel@banderacom.com
      or
     KetnerBarnes Inc.
     Jeff Ketner, 512/497-8876
     jketner@ketnerbarnes.com